Zen and the Art of PDS Design

Zen and the Art of PDS Design

The title of this blog harkens back to the 1970s book, Zen and the Art of Motorcycle Maintenance, which is the best-selling philosophy book ever in the USA. I have chosen to borrow from it because in PDS design there is often a misunderstanding of the concept of quality and the conflict that arises when there is an absence of it. And, there exists something like a PDS Karma—every engineering effort undertaken in the PDS design process has a consequence in current or future hardware development efforts.

The design of power delivery systems has elements similar to other features within hardware design and, as a result:

• Designing a PDS is a complex and engineering-intense task.
• It has to be one of the first elements addressed during a product development effort.
• There are elements within current technology that make PDS design particularly challenging.

This blog will address the foregoing bullets with particular attention paid to the last one.

Why PDS Design Is Such a Big Deal

The number and character of factors that have to be addressed during PDS design include:

• Taking into account and resolving conflicting demands and goals.
• Examining loads; setting IC load data and what can be done when IC load data is not available. (More about this later in this blog).
• Accounting for all of the characteristics of PDS components including planes and L, C and Resonances.
• Getting power into and out of the planes and combining planes and capacitors.
• Deciding on PDS impedance and making all power rails low impedance.
• Determining types and numbers of capacitors.
• Designing the PCB stackup and addressing 4-layer boards that have no plane capacitance.
• Learning where the currents flow.
• Examining on-die and on-package capacitance.
• Having a design process that includes PDS design.
• Using PDS design tools
• Simulating and testing the PDS.

Addressing the foregoing is a big challenge in and of itself but when the particulars of today’s technologies are considered it’s easy to see why PDS design takes so much time and effort.

The Wrinkles Presented by Today’s Technologies

The elements of current technologies that significantly impact PDS design are due to but not limited to the following:

• Today’s designs have multiple, varying power sources.
• Today’s ICs have tens or hundreds of millions of real small-scale transistors.
• The really small gate lengths enable these high number of transistors to be put on one IC. These large numbers of transistors become the origin of high current rates. There are often a dozen or more Idds for a given PCB design.
• At the same time, the Vdds (operating voltages) are under one volt.
• There is very little margin for error.
• Small margins means that there’s not much tolerance for voltage drop in the power planes or in the connections up into the ICs. Added to this, there’s almost no allowance for ripple because the allowable variation is so small.
• To expand on the foregoing, the latest IC processor in the high-end Apple computer contains 650 million transistors. These transistors require some current when they switch. This is what drives the real high Idd or current drain. And, because the transistors are so small they cannot tolerate very high operating voltages. This is where Vdds of a volt or less come into play.

Who Is Being Most Impacted by PDS Design?

A few years back, complex PDS design was limited to high-end, complex power delivery systems and the engineers involved in designing them became aware of the challenges associated with the PDS design process.

The people who are being caught a bit off-guard now are those who have been designing consumer electronics. Prior to current designs, PDS design in consumer electronics involved connecting the dots. Now that complex PDS designs are in consumer-level electronics, there are product developers who are being taken by surprise.

And, the complex PDS design process is not limited to a handful of products. About every product you can name has taken advantage of the huge ICs with millions of transistors to do more complex operations. The reality is that everybody wants a faster computer; everyone wants a video game that runs quicker, and everyone wants their Internet router to go faster.

Of the foregoing, the biggest operations within any device are linked to graphics processing. For instance, the technology that comes into play when a mobile phone is rotated from vertical to horizontal such that the screen remains in alignment requires the technology capability that we used to refer to as a supercomputer. There are so many features in a smartphone—several radios, one or more cameras, the screen, the processors inside, and the memory all of which consume power. It becomes a real challenge to manage all of the various power zones. It’s important to remember that for every power rail in a device there is a PDS and it is not uncommon to have 15-20+ PDSs in a smartphone.

Where Does PDS Come Into the Overall Product Development Process?

The good news is that routing a design has become easier because of differential signaling but it means that the PDS should be designed first. Actually, you can’t design the PCB stackup until you have designed the PDS. And the following factors need to be taken into account:

• Finding out what the loads look like.
• The PDS needs to be designed so that the loads have what they need for a part to do its job.
• The number of loads needed is device dependent. (More about this below).
• It’s not uncommon to have four or five different supply voltages for just one IC.
• One of the last Microsoft X-boxes had eight different power supplies for one IC (think graphics processing).
• Every supply needs to be engineered such that its load is satisfied.
• The stackup is then designed to house all of the foregoing.
• This process is complicated by the sequence in which these supplies are turned on.
• If the wrong supply is turned on first, it can kill the IC. (This is where the control chip and the controller network come into play).

Common Mistakes Made When Designing a PDS

Given the foregoing, there are a lot of places where mistakes can be made in creating a PDS design but below are some of the most common ones:

• The most common mistake is relying 100% on the app notes. While they have gotten better, they are often inaccurate. Some are way beyond “not accurate.”
• If the app notes aren’t accurate the product developer needs to have enough skill to know how to compensate for that inaccuracy.
• It’s imperative to engineer the impedance of each rail so it’s low enough that all the frequencies of the chip being used are correctly handled.
• While this is well understood, the information has not been well shared.
• The one IC manufacturer who has provided that information is Altera (now part of Intel). There’s even a tool that is free to customers. This tool is available on the Altera/Intel web site.

Because it’s not possible to do in-circuit testing, it’s crucial that the PDS is always guaranteed to work and is always stable. If the PDS is screwed up at the design phase, there are no band-aid fixes. The only solution is to throw away the PCB and all the chips and start the design process from square one. It’s the Tsunami of a failed design—the board is lost, the chips are lost, the product window can be missed, and the competitive edge can be lost. This is why the traditional approach of respinning a design two or three times is not a valid product development approach (nor has it ever been).

What Are The Critical Must Haves?

Given the foregoing, there are some must haves to ensure that a working, reliable PDS is created. They include:

• Having an electrical engineer in charge of designing the PDS and making sure that it is correctly integrated into the rest of the design.
• As noted above, getting the PDS designed and built right is about getting the stackup right.
• Making sure the right materials have been selected.
• This is done to ensure the high-speed links work.
• Finding out what the loads look like.
• It’s rare the information is 100% accurate.
• If there isn’t good load information the product developer needs to be become a pessimist.
• If the peak current is X amps then the delta current is X amps. This info is needed for any frequency from DC to way out there.
• The PDS is engineered around this.
• Finding out what the allowable tolerances are for variation (i.e. ripple).
• Engineering the PDS so that when the part is active the target is met.
• Some engineers will use the info on the manufacturer’s data sheet which will say +/- X percent. That’s not the information that is needed. The signals have to be routed over Vdd planes and the ripple on that plane is coupled onto the signal.
• It’s important to find out how much noise the logic signals can tolerate.
• This becomes the ripple spec.

Want to achieve PDS Nirvana?

Given the foregoing, there are lots of pieces/parts that go into successfully designing a working PDS. There have been numerous articles and books that have addressed PDS either as a stand-alone topic or as part of the overall system design process. For those who are new to the PDS design process or are struggling with an existing PDS design, there is a one-day, on-line course now being offered through Endeavor Business Media that is accessible through: Power Delivery System Design – Engineering Academy (designengineeracademy.com). The course is taught by Speeding Edge President, Lee Ritchey. More than 12,000 engineers world-wide have participated in his on-line and in-person training classes and Lee bases all of his training on the real-world hardware that he has designed for more than five decades.